Discussion:
[PATCH] ARM: dts: BCM5301X: Add support for Linksys EA9500
(too old to reply)
Vivek Unune
2017-03-15 15:10:02 UTC
Permalink
Hardware Info
-------------

Processor - Broadcom BCM4709C0KFEBG dual-core @ 1.4 GHz
Switch - BCM53012 in BCM4709C0KFEBG & external BCM53125
DDR3 RAM - 256 MB
Flash - 128 MB (Toshiba TC58BVG0S3HTA00)
2.4GHz - BCM4366 4×4 2.4/5G single chip 802.11ac SoC
Power Amp - Skyworks SE2623L 2.4 GHz power amp (x4)
5GHz x 2 - BCM4366 4×4 2.4/5G single chip 802.11ac SoC
Power Amp - PLX Technology PEX8603 3-lane, 3-port PCIe switch
Ports - 8 Ports, 1 WAN Ports
Antennas - 8 Antennas
Serial Port - @J6 [GND,TX,RX] (VCC NC) 115200 8n1

I was able to test this with Lede with following quirks.

- Broadcom 4366c0 wireless chip is used and it's firmware package doesn't
exist yet. I was able to test it with firmware that came buried in the
router's dhd.ko
- CPU is connected to port 5
- It has two switches in order to support 8 lan ports. Internal switch is
BCM53012. The external switch BCM53125 currently works as "dumb switch"
- Using 8 bit ECC gives errors, switching to 1 bit ECC solved the issue
- It uses dual firmware (trx) copies for failsafe purposes.

Installation
------------

Linksys gpg-signs their firmware for this router, hence it is not
possible to install using Factory UI.

This router needs serial cable hooked up to J6. Then interrupt the boot
process by Ctrl+C to enter CFE prompt
From there execute:
`flash -noheader 192.168.1.10:/lede.trx nflash0.trx`
where 192.168.1.10 is where your tftp server should is running.
You may want to reset partial boots using
`nvram set partialboot=0 && nvram commit' while at CFE prompt.

TODO
----

- Add BCM53125 (secondary switch) to dts
- Add robo_reset gpio (pin# 10 active low) to dts

Signed-off-by: Vivek Unune <***@gmail.com>
---
arch/arm/boot/dts/bcm47094-linksys-panamera.dts | 97 ++++++++++++++++++++++++-
1 file changed, 96 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
index b6750f7..75537ed 100644
--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
@@ -7,7 +7,7 @@
/dts-v1/;

#include "bcm47094.dtsi"
-#include "bcm5301x-nand-cs0-bch8.dtsi"
+#include "bcm5301x-nand-cs0-bch1.dtsi"

/ {
compatible = "linksys,panamera", "brcm,bcm47094", "brcm,bcm4708";
@@ -32,5 +32,100 @@
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
};
+
+ rfkill {
+ label = "WiFi";
+ linux,code = <KEY_RFKILL>;
+ gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>;
+ };
+
+ reset {
+ label = "Reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ wps {
+ label = "bcm53xx:white:wps";
+ gpios = <&chipcommon 22 GPIO_ACTIVE_LOW>;
+ };
+
+ usb2 {
+ label = "bcm53xx:green:usb2";
+ gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
+ };
+
+ usb3 {
+ label = "bcm53xx:green:usb3";
+ gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
+ };
+
+ power {
+ label = "bcm53xx:white:power";
+ gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
+ };
+
+ wifi-disabled {
+ label = "bcm53xx:amber:wifi-disabled";
+ gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
+ };
+
+ wifi-enabled {
+ label = "bcm53xx:white:wifi-enabled";
+ gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ bluebar1 {
+ label = "bcm53xx:white:bluebar1";
+ gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
+ };
+
+ bluebar2 {
+ label = "bcm53xx:white:bluebar2";
+ gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
+ };
+
+ bluebar3 {
+ label = "bcm53xx:white:bluebar3";
+ gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>;
+ };
+
+ bluebar4 {
+ label = "bcm53xx:white:bluebar4";
+ gpios = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
+ };
+
+ bluebar5 {
+ label = "bcm53xx:white:bluebar5";
+ gpios = <&chipcommon 19 GPIO_ACTIVE_HIGH>;
+ };
+
+ bluebar6 {
+ label = "bcm53xx:white:bluebar6";
+ gpios = <&chipcommon 20 GPIO_ACTIVE_HIGH>;
+ };
+
+ bluebar7 {
+ label = "bcm53xx:white:bluebar7";
+ gpios = <&chipcommon 21 GPIO_ACTIVE_HIGH>;
+ };
+
+ bluebar8 {
+ label = "bcm53xx:white:bluebar8";
+ gpios = <&chipcommon 8 GPIO_ACTIVE_HIGH>;
+ };
+
};
};
+
+&usb2 {
+ vcc-gpio = <&chipcommon 13 GPIO_ACTIVE_HIGH>;
+};
+
+&usb3 {
+ vcc-gpio = <&chipcommon 14 GPIO_ACTIVE_HIGH>;
+};
--
2.7.4
Andrew Lunn
2017-03-15 19:00:01 UTC
Permalink
Hi Vivek
Post by Vivek Unune
- It has two switches in order to support 8 lan ports. Internal switch is
BCM53012. The external switch BCM53125 currently works as "dumb switch"
Do you know how the second switch is connected? Is it cascaded off the
internal switch? Or does it have a dedicated Ethernet interface?

Thanks
Andrew
Vivek Unune
2017-03-15 19:50:02 UTC
Permalink
Andrew,

I'm not entirely sure. But here is what I observed.
Bootloader sets up both the switches. And I can use all 8 ports of the
router when I boot Lede. Only the internal switch is detected and
configurable via swconfig tool
Internal switch is connected to CPU via port 5 same as Netgear R8000.
The other bit here is that I looked through the GPL source and gpio
pin 10 is labeled as EA9500_RST2LANSW_GPIO10_PIN/ResetSwitch. So when
I performed a robo reset of the pin and 5 ports (labeled 1 thru 5 on
the unit) of the 8 physical ports stopped working (no packets).

If the external switch were to be connect via dedicated ethernet
interface it should have shown up during the probe. Is in't it?
Unfortunately my understanding about network devices limits me to
investigate this further.

I'll be more than happy to perform any tests if needed.

Thanks,

Vivek

P.S sorry for duplicate email if you did get this first time around.
I've turned off HTML formatting.
Post by Andrew Lunn
Hi Vivek
Post by Vivek Unune
- It has two switches in order to support 8 lan ports. Internal switch is
BCM53012. The external switch BCM53125 currently works as "dumb switch"
Do you know how the second switch is connected? Is it cascaded off the
internal switch? Or does it have a dedicated Ethernet interface?
Thanks
Andrew
Florian Fainelli
2017-03-15 20:00:02 UTC
Permalink
Post by Vivek Unune
Andrew,
I'm not entirely sure. But here is what I observed.
Boot loader sets up both the switches. And I can use all 8 ports of the
router when I boot Lede. Only the internal swich is detected and
configurable via swconfig tool
Internal switch is connected to CPU via port 5 same as Netgear R8000.
The other bit here is that I looked through the GPL source and gpio pin
10 is labeled as EA9500_RST2LANSW_GPIO10_PIN/ResetSwitch. So when I
performed a robo reset of the pin and 5 (labeled 1 thru 5 on the unit)
of the 8 physical ports stopped working (no packets).
If the external switch were to be connect via dedicated ethernet
interface it should have shown up during the probe. Is in't it?
Not necessarily, and probably not with LEDE which would treat the
external 53125 as a dumb switch and not even see it. With a mainline
kernel and the B53 DSA driver you would be able to represent both
switches in Device Tree and describe how they are cascading from each other.

The potential Device Tree changes could look like this (based on your
explanation, but I am not sure) for your platform, assuming the 53125 is
actually exposing the front panel ports and that we did introduce a
"mdio" node which would be required to expose the external BCM53125 switch.


/* There is no MDIO node, there should be one */
&mdio {
status = "okay";

***@30 {
#address-cells = <1>;
#size-cells = <0>;
reset-gpios = <&gpio 10>;
reset-names = "robo_reset";

ports {
#address-cells = <1>;
#size-cells = <0>;

***@0 {
reg = <0>;
label = "lan1";
};

***@1 {
reg = <1>;
label = "lan2";
};

***@2 {
reg = <2>;
label = "lan3";
};

***@3 {
reg = <3>;
label = "lan1";
};

***@4 {
reg = <4>;
label = "wan";
};

***@5 {
reg = <5>;
label = "cpu";
ethernet = <&sw0port8>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};

&srab {
status = "okay";

ports {
#address-cells = <1>;
#size-cells = <0>;

***@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};

sw0port8: ***@8 {
reg = <8>;
label = "extswitch";

fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
Post by Vivek Unune
Thanks,
Vivek
Hi Vivek
Post by Vivek Unune
- It has two switches in order to support 8 lan ports. Internal
switch is
Post by Vivek Unune
BCM53012. The external switch BCM53125 currently works as "dumb
switch"
Do you know how the second switch is connected? Is it cascaded off the
internal switch? Or does it have a dedicated Ethernet interface?
Thanks
Andrew
--
Florian
Vivek Unune
2017-03-15 20:20:02 UTC
Permalink
Thanks Florian.

Let me try this out. First I'll try to figure out how to add a mdio node.

Over the weekend I was trying enable DSA driver, but did not see DSA
under network. I'm using LEDE source with kernel 4.9. Nor did I see it
when I tried 'make kernel_menuconfig'

Thanks again.

On Wed, Mar 15, 2017 at 3:49 PM, Florian Fainelli
Post by Florian Fainelli
Post by Vivek Unune
Andrew,
I'm not entirely sure. But here is what I observed.
Boot loader sets up both the switches. And I can use all 8 ports of the
router when I boot Lede. Only the internal swich is detected and
configurable via swconfig tool
Internal switch is connected to CPU via port 5 same as Netgear R8000.
The other bit here is that I looked through the GPL source and gpio pin
10 is labeled as EA9500_RST2LANSW_GPIO10_PIN/ResetSwitch. So when I
performed a robo reset of the pin and 5 (labeled 1 thru 5 on the unit)
of the 8 physical ports stopped working (no packets).
If the external switch were to be connect via dedicated ethernet
interface it should have shown up during the probe. Is in't it?
Not necessarily, and probably not with LEDE which would treat the
external 53125 as a dumb switch and not even see it. With a mainline
kernel and the B53 DSA driver you would be able to represent both
switches in Device Tree and describe how they are cascading from each other.
The potential Device Tree changes could look like this (based on your
explanation, but I am not sure) for your platform, assuming the 53125 is
actually exposing the front panel ports and that we did introduce a
"mdio" node which would be required to expose the external BCM53125 switch.
/* There is no MDIO node, there should be one */
&mdio {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
reset-gpios = <&gpio 10>;
reset-names = "robo_reset";
ports {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
label = "lan1";
};
reg = <1>;
label = "lan2";
};
reg = <2>;
label = "lan3";
};
reg = <3>;
label = "lan1";
};
reg = <4>;
label = "wan";
};
reg = <5>;
label = "cpu";
ethernet = <&sw0port8>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
&srab {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
reg = <8>;
label = "extswitch";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
Post by Vivek Unune
Thanks,
Vivek
Hi Vivek
Post by Vivek Unune
- It has two switches in order to support 8 lan ports. Internal
switch is
Post by Vivek Unune
BCM53012. The external switch BCM53125 currently works as "dumb
switch"
Do you know how the second switch is connected? Is it cascaded off the
internal switch? Or does it have a dedicated Ethernet interface?
Thanks
Andrew
--
Florian
Florian Fainelli
2017-03-15 21:20:02 UTC
Permalink
Post by Vivek Unune
Thanks Florian.
Let me try this out. First I'll try to figure out how to add a mdio node.
Over the weekend I was trying enable DSA driver, but did not see DSA
under network. I'm using LEDE source with kernel 4.9. Nor did I see it
when I tried 'make kernel_menuconfig'
(please don't top post on public mailing lists)

You need to enable SWITCHDEV to have DSA. AFAIR SWITCHDEV may depend on
EXPERT/EXPERIMENTAL as of 4.9 (or that was before).
Post by Vivek Unune
Thanks again.
On Wed, Mar 15, 2017 at 3:49 PM, Florian Fainelli
Post by Florian Fainelli
Post by Vivek Unune
Andrew,
I'm not entirely sure. But here is what I observed.
Boot loader sets up both the switches. And I can use all 8 ports of the
router when I boot Lede. Only the internal swich is detected and
configurable via swconfig tool
Internal switch is connected to CPU via port 5 same as Netgear R8000.
The other bit here is that I looked through the GPL source and gpio pin
10 is labeled as EA9500_RST2LANSW_GPIO10_PIN/ResetSwitch. So when I
performed a robo reset of the pin and 5 (labeled 1 thru 5 on the unit)
of the 8 physical ports stopped working (no packets).
If the external switch were to be connect via dedicated ethernet
interface it should have shown up during the probe. Is in't it?
Not necessarily, and probably not with LEDE which would treat the
external 53125 as a dumb switch and not even see it. With a mainline
kernel and the B53 DSA driver you would be able to represent both
switches in Device Tree and describe how they are cascading from each other.
The potential Device Tree changes could look like this (based on your
explanation, but I am not sure) for your platform, assuming the 53125 is
actually exposing the front panel ports and that we did introduce a
"mdio" node which would be required to expose the external BCM53125 switch.
/* There is no MDIO node, there should be one */
&mdio {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
reset-gpios = <&gpio 10>;
reset-names = "robo_reset";
ports {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
label = "lan1";
};
reg = <1>;
label = "lan2";
};
reg = <2>;
label = "lan3";
};
reg = <3>;
label = "lan1";
};
reg = <4>;
label = "wan";
};
reg = <5>;
label = "cpu";
ethernet = <&sw0port8>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
&srab {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
reg = <8>;
label = "extswitch";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
Post by Vivek Unune
Thanks,
Vivek
Hi Vivek
Post by Vivek Unune
- It has two switches in order to support 8 lan ports. Internal
switch is
Post by Vivek Unune
BCM53012. The external switch BCM53125 currently works as "dumb
switch"
Do you know how the second switch is connected? Is it cascaded off the
internal switch? Or does it have a dedicated Ethernet interface?
Thanks
Andrew
--
Florian
--
Florian
Vivek Unune
2017-06-27 17:10:01 UTC
Permalink
On Wed, Mar 15, 2017 at 5:19 PM, Florian Fainelli
Post by Florian Fainelli
Post by Vivek Unune
Thanks Florian.
Let me try this out. First I'll try to figure out how to add a mdio node.
Over the weekend I was trying enable DSA driver, but did not see DSA
under network. I'm using LEDE source with kernel 4.9. Nor did I see it
when I tried 'make kernel_menuconfig'
(please don't top post on public mailing lists)
You need to enable SWITCHDEV to have DSA. AFAIR SWITCHDEV may depend on
EXPERT/EXPERIMENTAL as of 4.9 (or that was before).
Florian,

I have managed to use DSA driver and was able detect both internal and
external switches. However, I only get packets flowing only through the
internal switch. I have used the ip & bridge commands to setup the vlan
101 & 102 for lan and wan respectively.

VLAN101 = lan1 lan2 lan3 lan4 lan5 lan6 lan7 lan8 eth0.101
VLAN102 = wan eth0.102

Reading configs from the factory firmware, I'm sure that sw0port0 and
sw1port8 are connected. Excerpt from the same:

port_numbers=0 2 4 2 1 3 1 3
port_switch_id=1 1 1 0 1 1 0 0
port_names=port0 port1 port2 port3 port4 port5 port6 port7
cpu_port_number=5 7 8
cpu_port_switch_id=0 0 0
hidden_port_numbers=0 8
hidden_port_switch_id=0 1

Below is my updated device tree.

Thanks,

Vivek

&srab {
compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
status = "okay";
dsa,member = <0 0>;

ports {
#address-cells = <1>;
#size-cells = <0>;

***@1 {
reg = <1>;
label = "lan7";
};

***@2 {
reg = <2>;
label = "lan4";
};

***@3 {
reg = <3>;
label = "lan8";
};

***@4 {
reg = <4>;
label = "wan";
};

***@5 {
reg = <5>;
ethernet = <&gmac0>;
label = "cpu";

fixed-link {

speed = <1000>;
full-duplex;
};
};

sw0port0: ***@0 {
reg = <0>;
label = "extswitch";

fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};

&mdiomux {
mdio-***@0 {
reg = <0x00>;
address-cells = <1>;
size-cells = <0>;

***@0 {
compatible = "brcm,bcm53125";
#address-cells = <1>;
#size-cells = <0>;
reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
reset-names = "robo_reset";
reg = <0>;
dsa,member = <1 0>;

ports {
#address-cells = <1>;
#size-cells = <0>;

***@0 {
reg = <0>;
label = "lan1";
};

***@1 {
reg = <1>;
label = "lan5";
};

***@2 {
reg = <2>;
label = "lan2";
};

***@3 {
reg = <3>;
label = "lan6";
};

***@4 {
reg = <4>;
label = "lan3";
};

sw1port8:***@8 {
reg = <8>;
ethernet = <&sw0port0>;
label = "cpu";
phy-mode = "rgmii-txid";

fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
};
Florian Fainelli
2017-06-27 17:40:03 UTC
Permalink
Hi Vivek,
Post by Vivek Unune
On Wed, Mar 15, 2017 at 5:19 PM, Florian Fainelli
Post by Florian Fainelli
Post by Vivek Unune
Thanks Florian.
Let me try this out. First I'll try to figure out how to add a mdio node.
Over the weekend I was trying enable DSA driver, but did not see DSA
under network. I'm using LEDE source with kernel 4.9. Nor did I see it
when I tried 'make kernel_menuconfig'
(please don't top post on public mailing lists)
You need to enable SWITCHDEV to have DSA. AFAIR SWITCHDEV may depend on
EXPERT/EXPERIMENTAL as of 4.9 (or that was before).
Florian,
I have managed to use DSA driver and was able detect both internal and
external switches. However, I only get packets flowing only through the
internal switch. I have used the ip & bridge commands to setup the vlan
101 & 102 for lan and wan respectively.
VLAN101 = lan1 lan2 lan3 lan4 lan5 lan6 lan7 lan8 eth0.101
That looks reasonable although keep in mind that the IMP/CPU interfaces
of the switch are configured with VLAN tags (see commit [1]), so you may
need to make sure that port 0 of the internal switch is not accidentally
configured back to untagged since that would cause problem when
terminating the VLAN tag on the SW side.

So here are a few things that you want to check:

- read the MIB counters from the "extswitch" interface and see if
packets flow through in both directions with no errors

- check the "extswitch" VLAN configuration on both the internal switch
side (port 0) and on the external switch side ("cpu", port 8, not visible)

- see if you can get traffic end-to-end from eth0 all the way through
one of the external switch port. If that's the case, that means that the
configuration of internal switch port 0, internal switch CPU port, and
external switch external port is working and operational

[1]:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e47112d9d6009bf6b7438cedc0270316d6b0370d
Post by Vivek Unune
VLAN102 = wan eth0.102
port_numbers=0 2 4 2 1 3 1 3
port_switch_id=1 1 1 0 1 1 0 0
port_names=port0 port1 port2 port3 port4 port5 port6 port7
Is 0 the identifier for the external or internal switch? If 0 is
internal switch identifier and 1 is the external switch identifier, your
Post by Vivek Unune
cpu_port_number=5 7 8
cpu_port_switch_id=0 0 0
hidden_port_numbers=0 8
hidden_port_switch_id=0 1
Below is my updated device tree.
Thanks,
Vivek
&srab {
compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
status = "okay";
dsa,member = <0 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
label = "lan7";
};
reg = <2>;
label = "lan4";
};
reg = <3>;
label = "lan8";
};
reg = <4>;
label = "wan";
};
reg = <5>;
ethernet = <&gmac0>;
label = "cpu";
fixed-link {
speed = <1000>;
full-duplex;
};
};
I think this is meant to be port 8 here based on the hidden_port_number
value. This actually matters for VLAN configuration because B53 is not
(unfortunately, to be fixed) consistently using dst->cpu_port (whatever
is configured in Device Tree) vs. dev->cpu_port (hardcoded to 8 for this
class of switch).

PS: on that front, we will have to rework that when we bring multiple
CPU port support in DSA/B53/bcm_sf2 and so for now what we could do is
just check that the configured CPU port in Device Tree is a valid CPU
port for that switch (typically 5, 7 or 8), and if not, just issue a
warning.
Post by Vivek Unune
reg = <0>;
label = "extswitch";
fixed-link {
speed = <1000>;
full-duplex;
};
There might be some additional configuration needed here for this port,
because by default, the port will most likely try to use its built-in
PHY and maybe that's what they did, they wired the built-in PHY directly
to the IMP port of the external switch.
Post by Vivek Unune
};
};
};
&mdiomux {
reg = <0x00>;
address-cells = <1>;
size-cells = <0>;
compatible = "brcm,bcm53125";
#address-cells = <1>;
#size-cells = <0>;
reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
reset-names = "robo_reset";
reg = <0>;
dsa,member = <1 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
label = "lan1";
};
reg = <1>;
label = "lan5";
};
reg = <2>;
label = "lan2";
};
reg = <3>;
label = "lan6";
};
reg = <4>;
label = "lan3";
};
reg = <8>;
ethernet = <&sw0port0>;
label = "cpu";
phy-mode = "rgmii-txid";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
};
--
Florian
Vivek Unune
2017-06-29 21:10:02 UTC
Permalink
Florian,
Post by Florian Fainelli
Post by Vivek Unune
I have managed to use DSA driver and was able detect both internal and
external switches. However, I only get packets flowing only through the
internal switch. I have used the ip & bridge commands to setup the vlan
101 & 102 for lan and wan respectively.
VLAN101 = lan1 lan2 lan3 lan4 lan5 lan6 lan7 lan8 eth0.101
That looks reasonable although keep in mind that the IMP/CPU interfaces
of the switch are configured with VLAN tags (see commit [1]), so you may
need to make sure that port 0 of the internal switch is not accidentally
configured back to untagged since that would cause problem when
terminating the VLAN tag on the SW side.
- read the MIB counters from the "extswitch" interface and see if
packets flow through in both directions with no errors
lan4 is on internal switch, lan1 on external. I cannot ping router from lan1

Inter- | Receive | Transmit
face |bytes packets errs drop|bytes packets errs drop
br-lan: 168590 1726 0 0 190542 753 0 0
extswitch: 0 0 0 0 101012 1221 0 0
lan1: 0 0 0 0 5382 111 0 0
lan4: 0 0 0 0 1306680 13909 0 0
eth0: 3276924 5539 0 0 1106135 5084 0 0
eth0.101: 169338 1732 0 0 190256 750 0 0
eth0.102: 2959522 3274 0 0 587248 1094 0 0
lo: 39390 502 0 0 39390 502 0 0
br-wan: 2956822 3254 0 0 587248 1094 0 0
Post by Florian Fainelli
- check the "extswitch" VLAN configuration on both the internal switch
side (port 0) and on the external switch side ("cpu", port 8, not visible)
#bridge vlan show
port vlan ids
extswitch None
extswitch
lan7 101 PVID Egress Untagged
lan7 101 PVID Egress Untagged
lan4 101 PVID Egress Untagged
lan4 101 PVID Egress Untagged
lan8 101 PVID Egress Untagged
lan8 101 PVID Egress Untagged
wan 102 PVID Egress Untagged
wan 102 PVID Egress Untagged
lan1 101 PVID Egress Untagged
lan1 101 PVID Egress Untagged
lan5 101 PVID Egress Untagged
lan5 101 PVID Egress Untagged
lan2 101 PVID Egress Untagged
lan2 101 PVID Egress Untagged
lan6 101 PVID Egress Untagged
lan6 101 PVID Egress Untagged
lan3 101 PVID Egress Untagged
lan3 101 PVID Egress Untagged
br-lan None
eth0.101 101 PVID Egress Untagged
eth0.101
br-wan None
eth0.102 102 PVID Egress Untagged
eth0.102
Post by Florian Fainelli
- see if you can get traffic end-to-end from eth0 all the way through
one of the external switch port. If that's the case, that means that the
configuration of internal switch port 0, internal switch CPU port, and
external switch external port is working and operational
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e47112d9d6009bf6b7438cedc0270316d6b0370d
Post by Vivek Unune
VLAN102 = wan eth0.102
port_numbers=0 2 4 2 1 3 1 3
port_switch_id=1 1 1 0 1 1 0 0
port_names=port0 port1 port2 port3 port4 port5 port6 port7
Is 0 the identifier for the external or internal switch? If 0 is
internal switch identifier and 1 is the external switch identifier, your
0 is internal here.
Post by Florian Fainelli
Post by Vivek Unune
cpu_port_number=5 7 8
cpu_port_switch_id=0 0 0
hidden_port_numbers=0 8
hidden_port_switch_id=0 1
Below is my updated device tree.
Thanks,
Vivek
&srab {
compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
status = "okay";
dsa,member = <0 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
label = "lan7";
};
reg = <2>;
label = "lan4";
};
reg = <3>;
label = "lan8";
};
reg = <4>;
label = "wan";
};
reg = <5>;
ethernet = <&gmac0>;
label = "cpu";
fixed-link {
speed = <1000>;
full-duplex;
};
};
I think this is meant to be port 8 here based on the hidden_port_number
value. This actually matters for VLAN configuration because B53 is not
(unfortunately, to be fixed) consistently using dst->cpu_port (whatever
is configured in Device Tree) vs. dev->cpu_port (hardcoded to 8 for this
class of switch).
When I connect to port 8 I receive no packets on internal switch.
Post by Florian Fainelli
PS: on that front, we will have to rework that when we bring multiple
CPU port support in DSA/B53/bcm_sf2 and so for now what we could do is
just check that the configured CPU port in Device Tree is a valid CPU
port for that switch (typically 5, 7 or 8), and if not, just issue a
warning.
Post by Vivek Unune
reg = <0>;
label = "extswitch";
fixed-link {
speed = <1000>;
full-duplex;
};
There might be some additional configuration needed here for this port,
because by default, the port will most likely try to use its built-in
PHY and maybe that's what they did, they wired the built-in PHY directly
to the IMP port of the external switch.
Do you know what that configuration might be?

Thanks,

Vivek
Vivek Unune
2017-08-14 04:50:02 UTC
Permalink
Florian,
Post by Vivek Unune
Florian,
Post by Florian Fainelli
Post by Vivek Unune
I have managed to use DSA driver and was able detect both internal and
external switches. However, I only get packets flowing only through the
internal switch. I have used the ip & bridge commands to setup the vlan
101 & 102 for lan and wan respectively.
VLAN101 = lan1 lan2 lan3 lan4 lan5 lan6 lan7 lan8 eth0.101
That looks reasonable although keep in mind that the IMP/CPU interfaces
of the switch are configured with VLAN tags (see commit [1]), so you may
need to make sure that port 0 of the internal switch is not accidentally
configured back to untagged since that would cause problem when
terminating the VLAN tag on the SW side.
- read the MIB counters from the "extswitch" interface and see if
packets flow through in both directions with no errors
lan4 is on internal switch, lan1 on external. I cannot ping router from lan1
Inter- | Receive | Transmit
face |bytes packets errs drop|bytes packets errs drop
br-lan: 168590 1726 0 0 190542 753 0 0
extswitch: 0 0 0 0 101012 1221 0 0
lan1: 0 0 0 0 5382 111 0 0
lan4: 0 0 0 0 1306680 13909 0 0
eth0: 3276924 5539 0 0 1106135 5084 0 0
eth0.101: 169338 1732 0 0 190256 750 0 0
eth0.102: 2959522 3274 0 0 587248 1094 0 0
lo: 39390 502 0 0 39390 502 0 0
br-wan: 2956822 3254 0 0 587248 1094 0 0
Please ignore above mib counters. I noticed that I see lot of RxFCSErrors
and RxSymbolErrors for extswitch. The count for both counters always
remain same.

***@LEDE:/# ethtool -S extswitch
NIC statistics:
tx_packets: 212
tx_bytes: 19179
rx_packets: 0
rx_bytes: 0
TxOctets: 14403
TxDropPkts: 0
TxBroadcastPkts: 24
TxMulticastPkts: 122
TxUnicastPkts: 0
TxCollisions: 0
TxSingleCollision: 0
TxMultipleCollision: 0
TxDeferredTransmit: 0
TxLateCollision: 0
TxExcessiveCollision: 0
TxPausePkts: 0
RxOctets: 3593
RxUndersizePkts: 0
RxPausePkts: 0
Pkts64Octets: 0
Pkts65to127Octets: 36
Pkts128to255Octets: 1
Pkts256to511Octets: 0
Pkts512to1023Octets: 0
Pkts1024to1522Octets: 0
RxOversizePkts: 0
RxJabbers: 0
RxAlignmentErrors: 0
RxFCSErrors: 37
RxGoodOctets: 0
RxDropPkts: 0
RxUnicastPkts: 0
RxMulticastPkts: 0
RxBroadcastPkts: 0
RxSAChanges: 0
RxFragments: 0
RxJumboPkts: 0
RxSymbolErrors: 37
RxDiscarded: 0
p08_TxOctets: 47537
p08_TxDropPkts: 0
p08_TxBroadcastPkts: 163
p08_TxMulticastPkts: 319
p08_TxUnicastPkts: 0
p08_TxCollisions: 0
p08_TxSingleCollision: 0
p08_TxMultipleCollision: 0
p08_TxDeferredTransmit: 0
p08_TxLateCollision: 0
p08_TxExcessiveCollision: 0
p08_TxPausePkts: 0
p08_RxOctets: 14403
p08_RxUndersizePkts: 0
p08_RxPausePkts: 0
p08_Pkts64Octets: 25
p08_Pkts65to127Octets: 102
p08_Pkts128to255Octets: 17
p08_Pkts256to511Octets: 2
p08_Pkts512to1023Octets: 0
p08_Pkts1024to1522Octets: 0
p08_RxOversizePkts: 0
p08_RxJabbers: 0
p08_RxAlignmentErrors: 0
p08_RxFCSErrors: 0
p08_RxGoodOctets: 14403
p08_RxDropPkts: 0
p08_RxUnicastPkts: 0
p08_RxMulticastPkts: 122
p08_RxBroadcastPkts: 24
p08_RxSAChanges: 40
p08_RxFragments: 0
p08_RxJumboPkts: 0
p08_RxSymbolErrors: 0
p08_RxDiscarded: 146
Post by Vivek Unune
Post by Florian Fainelli
- check the "extswitch" VLAN configuration on both the internal switch
side (port 0) and on the external switch side ("cpu", port 8, not visible)
#bridge vlan show
port vlan ids
extswitch None
extswitch
lan7 101 PVID Egress Untagged
lan7 101 PVID Egress Untagged
lan4 101 PVID Egress Untagged
lan4 101 PVID Egress Untagged
lan8 101 PVID Egress Untagged
lan8 101 PVID Egress Untagged
wan 102 PVID Egress Untagged
wan 102 PVID Egress Untagged
lan1 101 PVID Egress Untagged
lan1 101 PVID Egress Untagged
lan5 101 PVID Egress Untagged
lan5 101 PVID Egress Untagged
lan2 101 PVID Egress Untagged
lan2 101 PVID Egress Untagged
lan6 101 PVID Egress Untagged
lan6 101 PVID Egress Untagged
lan3 101 PVID Egress Untagged
lan3 101 PVID Egress Untagged
br-lan None
eth0.101 101 PVID Egress Untagged
eth0.101
br-wan None
eth0.102 102 PVID Egress Untagged
eth0.102
Post by Florian Fainelli
- see if you can get traffic end-to-end from eth0 all the way through
one of the external switch port. If that's the case, that means that the
configuration of internal switch port 0, internal switch CPU port, and
external switch external port is working and operational
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e47112d9d6009bf6b7438cedc0270316d6b0370d
Post by Vivek Unune
VLAN102 = wan eth0.102
port_numbers=0 2 4 2 1 3 1 3
port_switch_id=1 1 1 0 1 1 0 0
port_names=port0 port1 port2 port3 port4 port5 port6 port7
Is 0 the identifier for the external or internal switch? If 0 is
internal switch identifier and 1 is the external switch identifier, your
0 is internal here.
Post by Florian Fainelli
Post by Vivek Unune
cpu_port_number=5 7 8
cpu_port_switch_id=0 0 0
hidden_port_numbers=0 8
hidden_port_switch_id=0 1
Below is my updated device tree.
Thanks,
Vivek
&srab {
compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
status = "okay";
dsa,member = <0 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
label = "lan7";
};
reg = <2>;
label = "lan4";
};
reg = <3>;
label = "lan8";
};
reg = <4>;
label = "wan";
};
reg = <5>;
ethernet = <&gmac0>;
label = "cpu";
fixed-link {
speed = <1000>;
full-duplex;
};
};
I think this is meant to be port 8 here based on the hidden_port_number
value. This actually matters for VLAN configuration because B53 is not
(unfortunately, to be fixed) consistently using dst->cpu_port (whatever
is configured in Device Tree) vs. dev->cpu_port (hardcoded to 8 for this
class of switch).
When I connect to port 8 I receive no packets on internal switch.
I'm able to now use sw0port8 <-> eth2 (i.e use cpu port 8 to connect to gmac2).
For this I had to modify net/dsa/b53/b53_common.c (see below). This is how
it is setup in net/phy/b53/b53_common.c. Also need to set
cpu_port = B53_CPU_PORT for 53012 sw instead of B53_CPU_PORT_25

@@ -357,9 +357,11 @@ static void b53_enable_vlan(struct b53_d
b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, &vc5);
}

- mgmt &= ~SM_SW_FWD_MODE;

if (enable) {
+
+ mgmt |= SM_SW_FWD_MODE;
+
vc0 |= VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID;
vc1 |= VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN;
vc4 &= ~VC4_ING_VID_CHECK_MASK;
Post by Vivek Unune
Post by Florian Fainelli
PS: on that front, we will have to rework that when we bring multiple
CPU port support in DSA/B53/bcm_sf2 and so for now what we could do is
just check that the configured CPU port in Device Tree is a valid CPU
port for that switch (typically 5, 7 or 8), and if not, just issue a
warning.
Post by Vivek Unune
reg = <0>;
label = "extswitch";
fixed-link {
speed = <1000>;
full-duplex;
};
There might be some additional configuration needed here for this port,
because by default, the port will most likely try to use its built-in
PHY and maybe that's what they did, they wired the built-in PHY directly
to the IMP port of the external switch.
Do you know what that configuration might be?
Given that I see RxFCSErrors and RxSymbolErrors errors wrt extswitch.
configuration definitely needs tweaking. I tried setting the phy-mode to
rgmii and rgmii-txid but no go.

Thanks,

Vivek
Florian Fainelli
2017-08-14 16:40:02 UTC
Permalink
Post by Vivek Unune
Florian,
Post by Vivek Unune
Florian,
Post by Florian Fainelli
Post by Vivek Unune
I have managed to use DSA driver and was able detect both internal and
external switches. However, I only get packets flowing only through the
internal switch. I have used the ip & bridge commands to setup the vlan
101 & 102 for lan and wan respectively.
VLAN101 = lan1 lan2 lan3 lan4 lan5 lan6 lan7 lan8 eth0.101
That looks reasonable although keep in mind that the IMP/CPU interfaces
of the switch are configured with VLAN tags (see commit [1]), so you may
need to make sure that port 0 of the internal switch is not accidentally
configured back to untagged since that would cause problem when
terminating the VLAN tag on the SW side.
- read the MIB counters from the "extswitch" interface and see if
packets flow through in both directions with no errors
lan4 is on internal switch, lan1 on external. I cannot ping router from lan1
Inter- | Receive | Transmit
face |bytes packets errs drop|bytes packets errs drop
br-lan: 168590 1726 0 0 190542 753 0 0
extswitch: 0 0 0 0 101012 1221 0 0
lan1: 0 0 0 0 5382 111 0 0
lan4: 0 0 0 0 1306680 13909 0 0
eth0: 3276924 5539 0 0 1106135 5084 0 0
eth0.101: 169338 1732 0 0 190256 750 0 0
eth0.102: 2959522 3274 0 0 587248 1094 0 0
lo: 39390 502 0 0 39390 502 0 0
br-wan: 2956822 3254 0 0 587248 1094 0 0
Please ignore above mib counters. I noticed that I see lot of RxFCSErrors
and RxSymbolErrors for extswitch. The count for both counters always
remain same.
Yes that is not exactly good, it means that the RGMII interface between
the internal and external switches is not properly configured.
Post by Vivek Unune
tx_packets: 212
tx_bytes: 19179
rx_packets: 0
rx_bytes: 0
TxOctets: 14403
TxDropPkts: 0
TxBroadcastPkts: 24
TxMulticastPkts: 122
TxUnicastPkts: 0
TxCollisions: 0
TxSingleCollision: 0
TxMultipleCollision: 0
TxDeferredTransmit: 0
TxLateCollision: 0
TxExcessiveCollision: 0
TxPausePkts: 0
RxOctets: 3593
RxUndersizePkts: 0
RxPausePkts: 0
Pkts64Octets: 0
Pkts65to127Octets: 36
Pkts128to255Octets: 1
Pkts256to511Octets: 0
Pkts512to1023Octets: 0
Pkts1024to1522Octets: 0
RxOversizePkts: 0
RxJabbers: 0
RxAlignmentErrors: 0
RxFCSErrors: 37
RxGoodOctets: 0
RxDropPkts: 0
RxUnicastPkts: 0
RxMulticastPkts: 0
RxBroadcastPkts: 0
RxSAChanges: 0
RxFragments: 0
RxJumboPkts: 0
RxSymbolErrors: 37
RxDiscarded: 0
p08_TxOctets: 47537
p08_TxDropPkts: 0
p08_TxBroadcastPkts: 163
p08_TxMulticastPkts: 319
p08_TxUnicastPkts: 0
p08_TxCollisions: 0
p08_TxSingleCollision: 0
p08_TxMultipleCollision: 0
p08_TxDeferredTransmit: 0
p08_TxLateCollision: 0
p08_TxExcessiveCollision: 0
p08_TxPausePkts: 0
p08_RxOctets: 14403
p08_RxUndersizePkts: 0
p08_RxPausePkts: 0
p08_Pkts64Octets: 25
p08_Pkts65to127Octets: 102
p08_Pkts128to255Octets: 17
p08_Pkts256to511Octets: 2
p08_Pkts512to1023Octets: 0
p08_Pkts1024to1522Octets: 0
p08_RxOversizePkts: 0
p08_RxJabbers: 0
p08_RxAlignmentErrors: 0
p08_RxFCSErrors: 0
p08_RxGoodOctets: 14403
p08_RxDropPkts: 0
p08_RxUnicastPkts: 0
p08_RxMulticastPkts: 122
p08_RxBroadcastPkts: 24
p08_RxSAChanges: 40
p08_RxFragments: 0
p08_RxJumboPkts: 0
p08_RxSymbolErrors: 0
p08_RxDiscarded: 146
Post by Vivek Unune
Post by Florian Fainelli
- check the "extswitch" VLAN configuration on both the internal switch
side (port 0) and on the external switch side ("cpu", port 8, not visible)
#bridge vlan show
port vlan ids
extswitch None
extswitch
lan7 101 PVID Egress Untagged
lan7 101 PVID Egress Untagged
lan4 101 PVID Egress Untagged
lan4 101 PVID Egress Untagged
lan8 101 PVID Egress Untagged
lan8 101 PVID Egress Untagged
wan 102 PVID Egress Untagged
wan 102 PVID Egress Untagged
lan1 101 PVID Egress Untagged
lan1 101 PVID Egress Untagged
lan5 101 PVID Egress Untagged
lan5 101 PVID Egress Untagged
lan2 101 PVID Egress Untagged
lan2 101 PVID Egress Untagged
lan6 101 PVID Egress Untagged
lan6 101 PVID Egress Untagged
lan3 101 PVID Egress Untagged
lan3 101 PVID Egress Untagged
br-lan None
eth0.101 101 PVID Egress Untagged
eth0.101
br-wan None
eth0.102 102 PVID Egress Untagged
eth0.102
Post by Florian Fainelli
- see if you can get traffic end-to-end from eth0 all the way through
one of the external switch port. If that's the case, that means that the
configuration of internal switch port 0, internal switch CPU port, and
external switch external port is working and operational
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e47112d9d6009bf6b7438cedc0270316d6b0370d
Post by Vivek Unune
VLAN102 = wan eth0.102
port_numbers=0 2 4 2 1 3 1 3
port_switch_id=1 1 1 0 1 1 0 0
port_names=port0 port1 port2 port3 port4 port5 port6 port7
Is 0 the identifier for the external or internal switch? If 0 is
internal switch identifier and 1 is the external switch identifier, your
0 is internal here.
Post by Florian Fainelli
Post by Vivek Unune
cpu_port_number=5 7 8
cpu_port_switch_id=0 0 0
hidden_port_numbers=0 8
hidden_port_switch_id=0 1
Below is my updated device tree.
Thanks,
Vivek
&srab {
compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
status = "okay";
dsa,member = <0 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
label = "lan7";
};
reg = <2>;
label = "lan4";
};
reg = <3>;
label = "lan8";
};
reg = <4>;
label = "wan";
};
reg = <5>;
ethernet = <&gmac0>;
label = "cpu";
fixed-link {
speed = <1000>;
full-duplex;
};
};
I think this is meant to be port 8 here based on the hidden_port_number
value. This actually matters for VLAN configuration because B53 is not
(unfortunately, to be fixed) consistently using dst->cpu_port (whatever
is configured in Device Tree) vs. dev->cpu_port (hardcoded to 8 for this
class of switch).
When I connect to port 8 I receive no packets on internal switch.
I'm able to now use sw0port8 <-> eth2 (i.e use cpu port 8 to connect to gmac2).
For this I had to modify net/dsa/b53/b53_common.c (see below). This is how
it is setup in net/phy/b53/b53_common.c. Also need to set
cpu_port = B53_CPU_PORT for 53012 sw instead of B53_CPU_PORT_25
I actually plan to remove the use cpu_port entirely, or actually only
use it as a "hint" of which CPU ports are capable of supporting Broadcom
tags. A better change for now would be not to use dev->cpu_port, but
instead use ds->dst->cpu_dp->index like what b53_br_join() does.
Post by Vivek Unune
@@ -357,9 +357,11 @@ static void b53_enable_vlan(struct b53_d
b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, &vc5);
}
- mgmt &= ~SM_SW_FWD_MODE;
if (enable) {
+
+ mgmt |= SM_SW_FWD_MODE;
+
Humm, that I don't really understand because this is turning on managed
mode which only influences how multicast addresses are processed, it
should not make a different for non-MC traffic AFAICT.
Post by Vivek Unune
vc0 |= VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID;
vc1 |= VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN;
vc4 &= ~VC4_ING_VID_CHECK_MASK;
Post by Vivek Unune
Post by Florian Fainelli
PS: on that front, we will have to rework that when we bring multiple
CPU port support in DSA/B53/bcm_sf2 and so for now what we could do is
just check that the configured CPU port in Device Tree is a valid CPU
port for that switch (typically 5, 7 or 8), and if not, just issue a
warning.
Post by Vivek Unune
reg = <0>;
label = "extswitch";
fixed-link {
speed = <1000>;
full-duplex;
};
There might be some additional configuration needed here for this port,
because by default, the port will most likely try to use its built-in
PHY and maybe that's what they did, they wired the built-in PHY directly
to the IMP port of the external switch.
Do you know what that configuration might be?
Given that I see RxFCSErrors and RxSymbolErrors errors wrt extswitch.
configuration definitely needs tweaking. I tried setting the phy-mode to
rgmii and rgmii-txid but no go.
Configuration may have to be tuned on both switches unfortunately
because both RGMII interfaces would have the ability to configure
delays. Do you have a way to dump what the original firmware settings
for the register that b53_adjust_link() modifies such that we can see
what was previous configured?

Thanks!
--
Florian
Vivek Unune
2017-08-19 21:40:02 UTC
Permalink
Post by Florian Fainelli
Post by Vivek Unune
Please ignore above mib counters. I noticed that I see lot of RxFCSErrors
and RxSymbolErrors for extswitch. The count for both counters always
remain same.
Yes that is not exactly good, it means that the RGMII interface between
the internal and external switches is not properly configured.
It appears that I do not need to set any phy-mode on internal sw's
port 0 or external sw's port 8. Also, you were right about internal port 0 to
be configured as tagged member of the vlan. It was indeed set to untagged!
LEDE lacks aw way to configure this. But I can do this via a post script.

After making above changes I was able to ping the router using physical port on
external switch. However, the ping dies out after few seconds. I'm try to figure
out the cause for this. Al least, I have some connectivity!
Post by Florian Fainelli
Post by Vivek Unune
tx_packets: 212
tx_bytes: 19179
rx_packets: 0
rx_bytes: 0
TxOctets: 14403
TxDropPkts: 0
TxBroadcastPkts: 24
TxMulticastPkts: 122
TxUnicastPkts: 0
TxCollisions: 0
TxSingleCollision: 0
TxMultipleCollision: 0
TxDeferredTransmit: 0
TxLateCollision: 0
TxExcessiveCollision: 0
TxPausePkts: 0
RxOctets: 3593
RxUndersizePkts: 0
RxPausePkts: 0
Pkts64Octets: 0
Pkts65to127Octets: 36
Pkts128to255Octets: 1
Pkts256to511Octets: 0
Pkts512to1023Octets: 0
Pkts1024to1522Octets: 0
RxOversizePkts: 0
RxJabbers: 0
RxAlignmentErrors: 0
RxFCSErrors: 37
RxGoodOctets: 0
RxDropPkts: 0
RxUnicastPkts: 0
RxMulticastPkts: 0
RxBroadcastPkts: 0
RxSAChanges: 0
RxFragments: 0
RxJumboPkts: 0
RxSymbolErrors: 37
RxDiscarded: 0
p08_TxOctets: 47537
p08_TxDropPkts: 0
p08_TxBroadcastPkts: 163
p08_TxMulticastPkts: 319
p08_TxUnicastPkts: 0
p08_TxCollisions: 0
p08_TxSingleCollision: 0
p08_TxMultipleCollision: 0
p08_TxDeferredTransmit: 0
p08_TxLateCollision: 0
p08_TxExcessiveCollision: 0
p08_TxPausePkts: 0
p08_RxOctets: 14403
p08_RxUndersizePkts: 0
p08_RxPausePkts: 0
p08_Pkts64Octets: 25
p08_Pkts65to127Octets: 102
p08_Pkts128to255Octets: 17
p08_Pkts256to511Octets: 2
p08_Pkts512to1023Octets: 0
p08_Pkts1024to1522Octets: 0
p08_RxOversizePkts: 0
p08_RxJabbers: 0
p08_RxAlignmentErrors: 0
p08_RxFCSErrors: 0
p08_RxGoodOctets: 14403
p08_RxDropPkts: 0
p08_RxUnicastPkts: 0
p08_RxMulticastPkts: 122
p08_RxBroadcastPkts: 24
p08_RxSAChanges: 40
p08_RxFragments: 0
p08_RxJumboPkts: 0
p08_RxSymbolErrors: 0
p08_RxDiscarded: 146
I'm able to now use sw0port8 <-> eth2 (i.e use cpu port 8 to connect to gmac2).
For this I had to modify net/dsa/b53/b53_common.c (see below). This is how
it is setup in net/phy/b53/b53_common.c. Also need to set
cpu_port = B53_CPU_PORT for 53012 sw instead of B53_CPU_PORT_25
I actually plan to remove the use cpu_port entirely, or actually only
use it as a "hint" of which CPU ports are capable of supporting Broadcom
tags. A better change for now would be not to use dev->cpu_port, but
instead use ds->dst->cpu_dp->index like what b53_br_join() does.
This will be quite helpful as current implementation creates some confusion
when there are more than one cpu ports.
Post by Florian Fainelli
Post by Vivek Unune
@@ -357,9 +357,11 @@ static void b53_enable_vlan(struct b53_d
b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, &vc5);
}
- mgmt &= ~SM_SW_FWD_MODE;
if (enable) {
+
+ mgmt |= SM_SW_FWD_MODE;
+
Humm, that I don't really understand because this is turning on managed
mode which only influences how multicast addresses are processed, it
should not make a different for non-MC traffic AFAICT.
I tried to remove setting of SM_SW_FWD_MODE but no go. Even GPL source
sets it for 53012. For now I'll leave it until I get back to it.
Post by Florian Fainelli
Configuration may have to be tuned on both switches unfortunately
because both RGMII interfaces would have the ability to configure
delays. Do you have a way to dump what the original firmware settings
for the register that b53_adjust_link() modifies such that we can see
what was previous configured?
Thanks!
--
Florian
Thanks for your time!!

Vivek

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